Euro-Par 2022 | AMD Xilinx Tutorial | International European Conference on Parallel and Distributed Computing AMD Xilinx TutorialEuro-Par

AMD Xilinx Tutorial

Developing Accelerators using Vitis on AWS F1

Date: Tue 23 Aug

This tutorial will introduce the Xilinx Vitis development environment for developing FPGA accelerators.

Vitis environment enables the user to easily and productively develop accelerated algorithms and then efficiently implement and deploy them onto heterogeneous CPU-FPGA-ACAP systems. Vitis supports: C and C++ kernels. RTL design flows are also supported for experienced hardware developers. Each of these flows will be discussed, along with the open-source Xilinx Runtime Library and Vitis open-source accelerated libraries. We will also introduce the PYNQ project and show how PYNQ makes the use of Xilinx accelerator much easier.

The latest available cloud and local hardware will be covered including AWS F1, and the range of Alveo accelerator boards. Topics to be covered:

  • Xilinx Vitis development framework, design flows, and use cases
  • AWS and Alveo boards for FPGA acceleration
  • An introduction to PYNQ
  • Demonstration and hands-on-experience
  • Vitis development flowDeveloping, profiling and optimizing applications for FPGA
  • Using Xilinx accelerator in the cloud

Presenters: Cathal McCabe and Mario Ruiz

Gold Sponsors

Red Hat
sicsa

Silver Sponsors

Xilinx
Springer

Bronze Sponsors

IOHK