High-Performance Computing (HPC) is about delivering a large amount of computation in a small amount of time. Traditionally this was exclusively achieved in large-scale supercomputing systems. With the pressure from the applications for processing more complex problems and larger amounts of data and at the same time to offer all this in a system closer to the collection of the data we are observing an increasing demand for more energy-efficient high-performance architectures constrained not only by power limits but also energy consumption for battery driven devices and limited area for small edge devices.

Pressured by the limitations of Moore’s Law, research and industry are now driven to develop novel, more efficient Domain-Specific Architectures or Accelerators which are able to offer the required high performance with the required efficiency. Important current domains are big data and machine-learning, as well as graph-based applications. At the same time, the barrier between software and hardware seems to be fading with more effort on co-designed architectures which require a good interaction between both hardware and software to achieve the best efficiency. In addition, we are observing emerging new post-Moore efforts such as processing-in-memory and Quantum Computing. All these require not only developments in the architectures themselves but also in the supporting software tools and runtime systems.

Focus

• High-performance architectures from the edge to the cloud
• Domain-specific architectures for machine learning, big data and other
• Hardware-software accelerator co-design for high-performance and efficiency
• Reconfigurable computing for high-performance architectures and accelerators
• Processing-in-memory architectures
• Hybrid and heterogeneous computing mixing several, possibly different types of accelerators, and/or CPUs
• Tools and runtime systems for the support of high-performance architectures and accelerators
• Any other related topic